C0-microSD Design-in Guide

The C0-microSD drops into any host with a microSD slot that conforms to the 4-wire SD protocol or SD-over-SPI.

Typical application circuits

Example circuit of the Signaloid C0-microSD acting as a co-processor on a microcontroller-based embedded system (left), or on a single-board computer (right)

Power

Supply the module with 3.3 V on the microSD VDD pad (3.14 V to 3.5 V, see Electrical characteristics). The module generates its internal rails on-board, so the host only supplies VDD. Measured current draw stays below 8 mA on the published reference workload, well within any standard microSD slot budget.

Signal levels

The SD interface pads (pins 1 to 8) are LVCMOS 3.3. The SPI configuration port on the test pads (pins 9 to 14) is LVCMOS 1.8: connect external programmers at 1.8 V only. See Specifications → Pinout.

Connecting to a microcontroller over SD-over-SPI

A microcontroller-based system without an SD host controller can drive the C0-microSD through an ordinary SPI peripheral, using the SPI mode of the SD standard. The left-hand circuit in Typical application circuits shows this arrangement.

Pad mapping

Pad	Pad name	SPI signal	Microcontroller pin
1	SD_DAT2	Not used	None, pull up to 3.3 V
2	SD_DAT3	CS	Any GPIO, driven as chip select
3	SD_CMD	MOSI	SPI data out
4	VDD	Supply	3.3 V supply
5	SD_CLK	SCLK	SPI clock
6	VSS	Ground	Ground
7	SD_DAT0	MISO	SPI data in
8	SD_DAT1	Not used	None, pull up to 3.3 V

Electrical requirements

• Logic level: The SD pads are LVCMOS 3.3. Connect them directly to a microcontroller with 3.3 V I/O. A microcontroller with 1.8 V I/O needs a level shifter on all four SPI signals.
• Pull-up resistors: Fit pull-up resistors to 3.3 V on SD_CMD, SD_DAT0, SD_DAT1, SD_DAT2, and SD_DAT3. The SD Physical Layer Specification gives a range of 10 kΩ to 100 kΩ. The pull-up resistor on SD_DAT3 keeps the module deselected while the microcontroller resets and before its firmware configures the chip-select GPIO.
• Chip select: Give the module its own chip-select line. When other devices share the SPI bus, each of them must release MISO while its own chip select is high.
• Decoupling: Place a decoupling capacitor between VDD and VSS close to the socket.

Clock and SPI mode

Use SPI mode 0 (clock polarity 0, clock phase 0). The SPI clock can be up to 10 MHz.

Start-up timing

At power-up, the C0-microSD boots its bootloader and reads its boot configuration. A module configured for Signaloid SoC mode switches to that mode at once. A module in Bootloader mode waits 3 seconds for an SD host to initialize it and then loads the custom user bitstream if no host has done so. Before you insert the C0-microSD in the microcontroller host, use a development workstation to flash and configure the module to be in Signaloid SoC mode. See Modes and Custom Bitstream.

To develop an application that communicates with the C0-microSD over SD-over-SPI, see Using a Microcontroller Host.

Socket or solder-in

The module works in a standard microSD socket (hot-swappable), or you can design it into a product using the standard microSD land pattern (see Specifications). For development, an open-top socket such as the one on the SD-Dev carrier exposes the test pads for probing.

Standalone FPGA integration

When the C0-microSD runs a custom user bitstream without an SD host, six microSD pads and five test pads become configurable I/O. Integration details for that use are in Modes and Custom Bitstream.

Next steps

• Pinout, the pin names, signal standards, and debug pads your design connects to.
• Compatibility, the SD host controllers and platforms already validated with the module.
• Handling and ESD precautions, the assembly, storage, and handling limits for the module.
• Using a Microcontroller Host, driving the module from a CircuitPython microcontroller over SD-over-SPI.
• SD-Dev Carrier Board, a reference carrier for probing and power-cycling the module during bring-up.