C0-microSD+
The Signaloid C0-microSD+ is a low-power, hot-swappable system-on-module (SoM) that brings Signaloid distribution-extended compute hardware (UxHw®) to any system with a standard microSD slot. A host treats it as an unformatted block-storage device over the 4-wire SD protocol, so you can add it to an existing system without redesigning a circuit board or changing host firmware.
The C0-microSD+ is at the engineering-samples stage. Specifications, interfaces, and documentation are subject to change.
The module pairs a Lattice CrossLink-NX-33 FPGA with 320 KiB of on-chip SRAM and 16 MiB of non-volatile SPI flash. It features the built-in Signaloid SoC, a RISC-V core based on the Lattice RV32RX that implements a subset of Signaloid distribution-extended computation and handles communication with the host over the SD interface. You write your device application in C or C++, build it with UxHw distribution arithmetic on the Signaloid Cloud Compute Engine, and flash the resulting binary over the SD interface.
At a glance
| Attribute | Value |
|---|---|
| Form factor | microSD UHS-II outline (11 mm × 15 mm × 0.8 mm), SD signaling on the first pad row only |
| Host interface | SD 4-wire / SD-over-SPI |
| Max UxHw representation | Athens-64 |
| Speedup | up to 18× vs. an ARM Cortex-M33 (2.7 GFLOPS FP64-equivalent) |
| Clock frequency | 90 MHz |
| SoC RAM | 320 KiB on-chip SRAM |
| Non-volatile memory | 16 MiB SPI flash |
| ISA / ABI | RV32IMFC / ilp32f |
| Execution mode | SRAM, XIP from SPI flash |
| Power dissipation | < 150 mW |
| Operating temperature | −40 °C – 85 °C |
| Status | Engineering samples |
Key features
- Features the Signaloid SoC, so your host software flashes an application, starts the core, and begins exchanging data without any further device configuration.
- Supports execute in place (XIP). The core can run application binaries directly from the 16 MiB SPI flash, alongside the 320 KiB of on-chip SRAM.
- Programmable in C or C++ with UxHw distribution arithmetic. You build your device application on the Signaloid Cloud Compute Engine and flash the binary to the module over the SD interface.
- Appears as an unformatted block-storage device on any operating system that supports the standard SD 1.x protocol, with no additional drivers required.
- Supports the SD-over-SPI protocol for integration with low-cost microcontrollers.
- Fits standard microSD slots at 0.8 mm thickness.
- Power dissipation of less than 150 mW allows compute offload without additional cooling.
Target applications
- Sensor-fusion algorithms that exploit UxHw technology to achieve more than 18× speedup over comparable solutions.
- State-estimation algorithms (for example, Kalman filters and particle filters) for robotics applications such as autonomous mobile robots (AMRs).
- Bayesian decision making over collected positive and negative event samples.
- Battery state-of-charge estimation in battery energy storage systems (BESSs), electric vehicles, and portable electronic devices.
- Real-time distribution arithmetic in the conversion routines of industrial process sensors, for each calibrated sensor output.
Compatibility
- Programmable logic controllers (PLCs) that have unused microSD slots.
- Android mobile devices that have a microSD slot.
- Microcontroller-based embedded systems that support full SD 1.x or SD over SPI.
- Single-board computers with unused microSD slots.
For the card readers, computers, and embedded platforms that Signaloid has tested, see Compatibility.
Example projects
For the Signaloid demo applications that run on the C0-microSD+, see Examples and Demos.
Next steps
- Getting Started, unbox, identify, and run your first UxHw program.
- Developing UxHw Applications, write, build, and flash a device application.
- Host Interface and Protocol, how the host drives the module over the SD interface.
- Specifications, compute, memory, electrical characteristics, and the unified memory map.